DSP Group Unveils Next Generation DSP Architecture Family- Scalable, Extendible and Licensable

SANTA CLARA, California; August 12, 2002 -- DSP Group, Inc.
(NASDAQ: DSPG), the world leader in the development and licensing of
Digital Signal Processor (DSP) cores, today unveiled CedarDSPCore™, a new
licensable high performance and low power architecture. The CedarDSPCore
is a scalable and extendible architecture with various DSP cores designs
for different cost and performance metrics. It is targeted at a broad
range of markets and applications such as Communication Terminals- e.g. 3G
smartphones, 802.11a/b/g terminals and access points and broadband modems;
Infrastructure- e.g. base-stations, media gateways and DSLAMS; and Home
Entertainment- e.g. DVD recorders, PVRs and Set-top boxes.

"Once again, DSP Group is offering an exciting new high performance DSP
architecture," commented Will Strauss, president of market research firm
Forward Concepts. "The new scalable architecture allows the CedarDSPCore
to be employed across a broad product line from mid-performance to
very-high-performance applications while offering extendibility for
product differentiation. Coming from a company with established leadership
in DSP licensing, this powerful architecture will keep DSP Group as the
team to beat."

DSP Group's CedarDSPCore presents a unique mix of features designed to
benefit its licensees in three main areas: scalability, productivity and

Scalable Performance at low energy consumption:

Performance scalability allows CedarDSPCore licensees to develop
software-enabled products for infrastructure, wireless and multimedia
emerging markets. Combining Very Long Instruction Word (VLIW) and Single
Instruction Multiple Data (SIMD) technologies, the CedarDSPCore offers
operation speed of up to 450Mhz (0.13µ worst case process in a
synthesizable form) with scalable computation capability such as 2 to 8
Multiply-Accumulates (MACs) in a clustered model. Furthermore, the
scalability runs deeper than MACs as each cluster includes several
arithmetic and logical units and a large register file. Using four such
clusters results in a high performance architecture that executes numerous
parallel operations in a single cycle, up to a peak performance of 11
billion instructions per second. A scalable number of clusters with
scalable memory bandwidth and different data native words create various
core versions with a different mixture of performance-cost-energy
consumption metrics.


Programming in high-level languages such as C or C++ and the use of
compilers for optimization significantly shortens the software development
process and reduces time to market. The CedarDSPCore architecture was
conceptually designed for use with high-level programming language,
employing various features that increase compiler utilization. In addition
to the architecture design, the use of state-of-the-art compiler
optimization techniques results in a powerful and highly efficient
compiler for the CedarDSPCore.

The hardware implementation of CedarDSPCore, as in our previous
SmartCores series, has been designed from the ground up as a fully
synthesizable model, also known as a "soft core." This provides users a
short turn-around cycle when migrating between existing processes and
silicon foundries.
The CedarDSPCore is delivered with a complete and
advanced set of software and hardware development tools.


The growing adoption of industry standards for high volume applications
such as wireless LAN (802.11a/b/g) or cellular communications (WCDMA,
UMTS) creates a challenge for IC vendors as they attempt to differentiate
their products and provide added value. The CedarDSPCore gives our
licensees the flexibility to extend the architecture by adding user
proprietary extension units. These extensions allow the user to embed
value-added features while benefiting from an open, fully verified and
widely used architecture.

"The CedarDSPCore architecture will broaden our market presence to new
applications such as infrastructure, software-enabled wireless modems and
home entertainment," said Bat Sheva Ovadia, VP Marketing and Business
Development at DSP Group's Ceva Licensing Division. "Our significant
installed base of TeakLite, Teak and PalmDSPCore licensees, as well as
third party partners, will find the CedarDSPCore technology an enabler for
exploring additional opportunities, while taking advantage of legacy
developments and relationships they have developed with DSP Group over the
years," added Ms. Ovadia.

"DSP Group is the world's largest licensor of DSP Cores with more than
a decade of experience in successful licensing," said Eli Ayalon, Chairman
and CEO of DSP Group. "The CedarDSPCore's compelling set of features and
performance demonstrates our long-term commitment to our customers and to
the DSP market," added Mr. Ayalon.

A report published in April 2002 by Gartner Dataquest on Worldwide
Semiconductor Intellectual Property (SIP) Share Rankings awarded DSP Group
Inc. No.1 position in 2001 for worldwide DSP Core IP revenues, with over
69 percent market share via sales of its SmartCores family of

About DSP Group, Inc.

DSP Group, Inc., is a global leader in
the development and marketing of high-performance, cost-effective,
licensable digital signal processing (DSP) cores. The company's family of
DSP cores provides ideal solutions for low-power, cost-effective
applications, such as cellular, broadband communications, VoIP,
multimedia, advanced telecommunications systems, disk-drive controllers,
and other types of embedded-control applications. By combining its DSP
core technologies with its proprietary, advanced speech-processing
algorithms, DSP Group also delivers a wide range of enabling,
application-specific integrated circuits (ICs) for full-featured,
integrated-telephony products and applications, including spread spectrum
wireless technologies. DSP Group maintains an international presence with
offices located around the globe. More information about DSP Group is
available from its Web site at http://www.dspg.com.

This press release may contain
statements that qualify as "forward-looking statements" under the Private
Securities Litigation Reform Act of 1995, including statements made by Ms.
Ovadia about the benefits and advantages of CedarDSPCore, including its
ability to broaden the Company's market presence, as well as the Company's
long-term strategy to develop and license more comprehensive, flexible
solutions and application-optimized platforms. These forward-looking
statements are based on current expectations and the Company assumes no
obligation to update this information. In addition, the events described
in these forward-looking statements may not actually arise. The Company's
actual results could differ materially from those described in this press
release as a result of various factors, including, the acceptance by
customers of the CedarDSPCore, the Company's ability to develop and
license more application-optimized platforms incorporating the Company's
technology at cost-effective prices and to add innovative features that
differentiate its products from those of its competitors and the general
market demand for products that incorporate the Company's technology.
These factors and other factors which may effect future operating results
or our stock price are discussed under "RISK FACTORS" in our reports on
form 10-K for the year ended December 31, 2001 and form 10-Q for the
quarter ended March 31, 2002, both of which have been filed with the
Securities and Exchange Commission and is also available on our Web site
(www.dspg.com) under Investor Relations.

CedarDSPCore is a
trademark of DSP Group, Inc. SmartCores, Teak, TeakLite and PalmDSPCore
are registered trademarks of DSP Group, Inc. Other brands and products
referenced herein are the trademarks or registered trademarks of their
respective holders.