Fifth-Generation Computer Vision and Deep Learning Embedded Platform

The Ceva-XM6 is a fifth-generation imaging and computer vision image processor IP from Ceva, and is designed to bring deep learning and artificial intelligence capabilities to low-power embedded systems, targeting mass-market intelligent vision applications.

The Ceva-XM6 delivers superior performance for optimal real-time execution in time-critical use cases, such as autonomous driving, sense-and-avoid drones, virtual and augmented reality, smart surveillance, smartphones, robotics, and more. Its low power consumption meets the demands of battery-powered devices of all sizes, including those with multiple vision engines, and its small die size makes it a cost-effective solution for addressing mass-market applications.

A comprehensive, scalable, integrated hardware and software IP platform centered on the Ceva-XM6 includes the Ceva-NeuPro Studio, which greatly simplifies the development and deployment of deep learning systems for mass-market embedded devices. Added to this are hardware accelerators, software libraries, and a broad set of algorithms that support the development process and minimize cost, risk, and time-to-market.

The Ceva-XM6 based image processor addresses every aspect required to create a superior vision system with minimal effort, enabling users to focus their development efforts on product differentiation.


The CEVA-XM6 image processor is flexible and scalable, allowing it to address the many existing and emerging use cases in the constantly evolving domain of intelligent vision. It offers superior performance for optimal real-time execution in time-critical applications. The small die size and low power consumption make the CEVA-XM6 ideal for battery-powered, cost-sensitive, mass-market applications.

Designed for high-performance, deep-layered CNN implementations
Complete hardware and software toolkit for deep learning and SLAM applications
Power efficient at a fraction of the power consumption of leading GPUs

Main Features

  • Innovative vector processor unit (VPU) architecture
  • Optional 32-way SIMD vector floating-point unit
  • Enhanced 3D data processing scheme for accelerated CNN performance
  • Excellent control code performance using a new scalar unit which reduces code size, multi-core, and system integration overhead