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Ceva is looking for you to join our growing VLSI group.

Here at Ceva, we are developing state-of-the-art DSP ASIC projects in A.I, Vision, Wireless, and Base-stations areas. The VLSI team is responsible for the planning and implementation of DSP cores and accelerators, which are part of many future products.

We are seeking a highly skilled and motivated VLSI Backend Engineer to join our dynamic team. As a Senior Backend Engineer, you will play a crucial role in the design and implementation of complex designs, flow development, and the latest technology node bring-up and integration.

• B.Sc. / M.Sc. in Electrical Engineering from a leading institute
• At least 5 years of experience as a VLSI Backend Engineer
• In-depth knowledge of Synthesis, P&R, and STA flows
• Hands-on experience of full RTL to GDS-II flow for complex designs
• Experience in development in advanced nodes (<16 nm)
• Experience in scripting using TCL and Python.

Advantage:

• Top-level integration experience for multi-partition SoC.
• In-depth knowledge of RTL (Verilog/SystemVerilog)

Personality:

• Self-motivated and self-directed, proactive
• Ability to achieve results in a fast-moving, agile flow, and dynamic environment, both locally and across the organization
• Ability to troubleshoot and analyze complex problems
• Excellent communication skills, both verbally and in writing
• Team player